ccPMC-BiSerial-III-TRANS
Conduction Cooled Transformer Coupled
PMC Compatible Bi-Directional Serial Data Interface
| Standard Single PMC |
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| The transcievers are capable of 40 MHz. Designed in clock generator and PLL. Location for reference oscillator for specific frequency requirements. Built in "Channelized DMA"™ to support higher speeds and larger file / transfer sizes. |
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| Standard 33 MHz. operation |
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| Standard 32 bit operation supported. |
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| PMC registers are read-writeable. Transmit and Receive functions separated. | |
| Transmit and Receive state-machines, FIFO Programmable almost empty [transmit] and programmable almost full [receive] have programmable interrupts. Status can be polled for non-interrupt driven operation as well. |
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| 8 transformer coupled RS-485 IO are provided. Any combination of transmit or receive channels can be created. |
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| The IO is available via the PMC "user IO" connector Pn4. The differential IO is properly routed with controlled spacing and matched lengths on each of the pairs. |
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| Dynamic Engineering crafts custom programmed interface solutions for our clients. Sometimes a previously completed version can work for you. Sometimes a hybrid of reuse and new is required. Please see below for a current list of completed implementations to choose from. We can port from the PMC-BiSerial-III to the "TRANS" and vice-versa as well. Contact Dynamic Engineering with your requirements. |
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| +5 only. 3.3V, 2.5V and 1.25V converted with on-board power supply. |
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| Memories built from Block RAM within the FPGA are the best solution for many applications. 8 - 2K x 32 FIFO(s) or Dual Port RAM(s) are available. Larger discrete FIFOs can be provided with sizes 4K-128K x 32 available. There are two positions for the discrete FIFOs. |
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| The PMC BiSerial is optimized for serial interfacing requirements. The FIFO memories and programmable interrupts off-load the CPU from most of the management other implementations require. The FIFO access is optimized for the PCI bus further reducing overhead by speeding up the data transfer. On the IO side the PMC BiSerial has independent channel functions. Channels can operate at maximum rate in parallel. With the Spartan III DMA can be implemented and still have plenty of gates left for your application. |
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| The PMC BiSerial is easily programmed to implement new functions. Many previously implemented "custom designs" are available too. Without the costs of schematic level design, layout, debugging etc. a modified BiSerial III will represent a large cost savings in your budget. |
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| The PMC BiSerial III is easy to use. Point and shoot - just fill the FIFO and set the start bit to get your custom protocol transmitting. Built in loop-back capabilities and engineering kits help with integration into your system. We can write a custom Windows® driver for you. |
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| Dynamic Engineering works to keep the PMC BiSerial III in stock. Send in your order and in most cases have your hardware the next day. With a custom design a 1-2 week design period is usually required. We can support immediately with the another version then send updated FLASH Files later to help get your project going - right away. |
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| The PMC BiSerial III is a standard single width PMC card and meets the PMC mechanical specifications for conduction cooled modules. The PMC-BiSerial-III-TRANS can be used in all PMC slots. |
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| The PMC BiSerial is PMC compliant per the IEEE 1386 specification. | |
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| The PMC BiSerial is PCI compliant. You can develop with a PCI to PMC adapter - PCI2PMC or PCIBPMC. |
