IP-Reflective Memory

The local area network that is quick to use, simple to operate, easy to maintain.


Each IP-ReflectiveMemory can be used as a standard node or as the Master Node. Clearly labled "DIP Switches" are provided to make the selection of Master or Standard Node, and the Node Address. The Network is based on using LVDS signaling over Ethernet cabling. Nodes automatically come up for pass through operation. Using the memory only requires reading and writing to the shared space. The Hardware takes care of the network side automatically.

All nodes automatically clear their local memory and then wait for the network to be initialized. The Master node initializes the network and then enables the rest of the nodes. LED´s on the rear of the card indicate the current status as well as optional to read status [software]. The network has a default rate of 18.432 MHz. The frequency was chosen to allow for lengths of more than 200 feet between nodes to be implemented without changing the frequency. Standard Cat5e cable was used for our testing.


Board Level Block Diagram

One of the boards in the network is enabled to be the Master. The Master will send out it´s status while the rest of the nodes wait. When the Master receives its status back it issues the Master Enable. On the rear of the cards the Master node will have the Master LED illuminated and the rest of the nodes will have the Master Enable LED. Once the Master Enable is received the other nodes begin using the network and sending their own status messages. The Local Status LED is illuminated when the local status is received back at each node. The status will appear to be on all of the time when properly functioning due to the rate of status being sent and the timer used for the LED. When messages are received from the network the node updates the local memory and passes the message to the next node [processed in parallel] unless the node address matches the node receiving the message in which case the message is filtered out. The master has an additional task of clearing out messages that have been around the loop and not cleared. A special loop-bit set by the Master on each message that passes the Master node for this purpose. The Network LED is illuminated when messages from other nodes are retransmitted. When local writes to memory occur, the messages are also transmitted to the network and cause the IP Access LED to be illuminated. With heavy traffic both activity LED´s may appear to be always on. For writes to local RAM, the location is tested to see if it is already at the same value and if so the write is filtered out to reduce traffic from redundant operations.

The frequency can be changed using the on-board PLL. The PLL is easy to program using the Windows® driver. Reference files are available to support other OS. Using the default rate, close to 1uS transfer times result meaning that the nodes update at close to 1 MHz with a propagation delay of NODE´s X 1 uS plus some overhead. The Network and local paths are supported with FIFO´s. With different cable lengths the frequency can be increased or decreased as needed. Custom default frequencies can be accommodated with an oscillator change.



IP-ReflectiveMemory is standard single wide IP which is 8 and 32 MHz. IP Bus compatible. The IP interface supports the IO, INT, ID and Memory spaces.

The shared memory is 256K x 16 located starting at Memory Space offset 0x00. The memory can be used with separate spaces or or shared spaces for each node. Separate spaces are likely to be used when separate parts of the same process are being worked on with multiple nodes. Combined spaces would be used when multple users are sharing the same data. The hardware does not restrict how the memory is configured or used. An interrupt is avaiable to alert the local CPU when a specific node makes a memory update.

The IO can be connected via RJ-45 connectors on the rear of IP-ReflectiveMemory or using the IP Module IO connector. The RJ-45 connector makes using standard Ethernet cable easy. Custom cables can be supported with the IO connector. The IO connector has the advantage of being lower profile. Type II with the IO connector, and Type III with the RJ-45´s.

The IP Module driver can be instantiated multiple times to control multiple cards by the same CPU. IP-ReflectiveMemory when coupled with the Dynamic Driver "knows" what slot it is in and which carrier it is installed into. The slot and carrier information is required when using multiple cards in a PCI system with dynamic address assignment. A known system configuration can be combined with the slot and carrier information to deterministically access the right card

PCI implementations can be done with the PCI3IP and PCI5IP. Applications from 1 node to 5 connections per PCI slot.
PCIe implementations can be done with the PCIe3IP and PCIe5IP. Applications with 1 - 5 ReflectiveMemory Nodes per PCIe slot.
cPCI 3U is supported with the cPCI2IP. Applications with 1 or 2 ReflectiveMemory Nodes per 3U cPCI slot.
cPCI 6U is supported with the cPCI4IP. Applications from 1 to 4 ReflectiveMemory Nodes per 6U cPCI slot.
PC104p is supported with the PC104pIP. Applications with 1 ReflectiveMemory Nodes per PC104 stack position.
PC104p situations with a custom mechanical can be done with the PC104p4IP.
Applications from 1 to 4 ReflectiveMemory Nodes per PC104 stack position.