PMC-Parallel-485

A simple "point and shoot" interface makes it easy to add up to 34 differential IO to your system with the PMC-Parallel-485. The PMC compatible PMC-Parallel-485 design adds 32 [RS-485 /RS-422/LVDS] differential IO lines to one slot of your carrier board. 2 additional differential pairs are available for a clock & clock enable. The signals can be used to capture data with an external reference or programmed to be references for the rest of the system. Many standard features and ease of VHDL updating make PMC-Parallel-485 a versatile design. PMC-Parallel-485 is a companion design for PMC-BiSerial-VI. The Biserial has a larger more capable FPGA and is intended for larger designs. PMC-Parallel-485 is a lower cost version with many of the same features scaled for smaller requirements. In addition ccPMC-BiSerial-VI incorporates conduction cooling - for the really tough design requirements.

If you see a PMC-BiSerial-XXX or XM based design that has more "channels" than you need we can likely port a reduced version to PMC-Parallel-485.

Each differential port is software programmable to be an input or an output. The lower four bits are independent. The rest are programmed on a nibble basis.

Each port is software programmable to be terminated or not. The lower four bits are independent. The rest of the bits are programmed on a nibble [4 bit group] basis.

Options to use a high density 68 pin SCSI III front panel connector and / or Pn4 to provide system IO. The connections to the front and rear IO are isolated to remove the unused trace length from your implementation. All IO is routed differentially with controlled impedance, and matching lengths to the front panel or Pn4.

The IO channels can be used as interrupt generators. Interrupts are programmable to be based on level or edge and active high or low. The registers are mapped as 32 bit words and support byte, word and 32 bit access. All registers are read-writeable.

An 8 bit user switch is provided to allow custom configurations to be easily and automatically configured with a common software driver. For example; the switch can be read through the status port and used to determine what the RX/TX configuration should be and any special characteristics for that implementation.

Certain IO lines have secondary purposes based on build options. Fused power, receive and repeat etc. Additional customization can be implemented to meet client requirements. All of the data bits pass through the FPGA used to implement the PCI interface. Any or all bits can be used for custom state machine and IO functions. Custom termination options are also available. Line selectable pull-up and pull-down resistor postions are available. Please contact Dynamic Engineering with your requirements.

A new custom version can be implemented in a very reasonable time. Typically a few weeks of design time for a medium sized project including the new VHDL set, Windows® , Linux or VxWorks driver, reference software package, and documentation. Click on the models tab for the base version and any client versions created to date - see if the configuration you need already exists or if we need to work on a custom version for you.

We can be rapid with our response because the designs are structured to allow channels to be moved in and out to create new design sets. Most designs have a fairly large component of reused "known good" VHDL that we can pull from allowing us to focus on the new functions required for your implementation. You receive the benefit of many man-years of design and test time with each new version created. Join our high reliability clients by taking advantage of our know-how to help speed your project to completion.

PMC-Parallel-485 can be used along with a PCIe or other carrier/adapter to use with a variety of system types - PCI, PCIe, PC104p, VPX cPCI, etc.. Dynamic Engineering has PMC carriers for PCI, PCIexpress, cPCI, PC104p, and can do custom design´s specific to client requirements as well. Please use the handy pull-down menu at the top of any page to navigate to other Dynamic Engineering products including carriers.

PMCs are independently specified through VITA for the form factor, connectors and pinouts of the PCI signaling; you can use PMC-Parallel-485 design with any carrier from any vendor that supports standard PMCs. To make it even easier the PMC-Parallel-485 has a universal PCI design to allow operation with VIO set to 3.3 or 5V.

It all starts with the PCB [Printed Circuit Board]. Quality design and quality materials are required to meet the strenuous requirements of many of our implementations. You can do the job quickly or you can do the design correctly. We pride ourselves on taking the time to put the extra work into our layouts. The quality goes in before the parts go on. In addition to routing strategy and layer counts, Via size, plating requirements, break-out trace widths, and materials are areas where quality comes into play. The via size and method of trace attachment to the via affect the signal shape and reliability. Using tear-drop trace connections to pads, vias and through hole components enhance the reliability and minimize the impedance discontinuity resulting in a cleaner signal. Using 8/10/12 mil vias provides adequate copper for proper power distribution and more surface area to bond to where traces are interconnected. The combination provides better vibration endurance than smaller vias and traces would provide. The design has several power planes with sufficient copper weight and coverage to provide the references required for the routing plus the current and voltages needed by the various devices on the board. The larger features make the design work more difficult since there is less room to "play with" and the end result is worth it.

The PCI interface has a published set of requirements for compliance which restrict length, impedance, loading and other factors. PMC-Parallel-485 is compliant with the PCI Specification.

The IO is available through either the front panel mounted SCSI connector or Pn4 or some combination. Each IO is isolated from the connectors with zero ohm resistors. The resistors are mounted front and rear and tied together at each pin to allow for a stub length of 1/16th in. The Connectors are routed from the resistor directly allowing for almost zero stub lengths and the option to connect front or rear IO options.

If your situation demands a custom application we will update the Xilinx FPGA and IO components. Send us your description and we will send you the interface. Please refer to the "Models" page for previously completed "customerized" PMC-Parallel-485 implementations.
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PMC Modules require a "carrier" in most cases to adapt them to the system. Dynamic Engineering has carrier solutions for a variety of formats.
PCIe implementations can be done with the PCIeBPMCX1 and PCIeBPMCX2.
PCI implementations can be done with the PCI2PMC and PCIBPMCX2.
cPCI 3U is supported with the cPCIBPMC3U64
cPCI 6U is supported with the cPCIBPMC6U.
PCI-104 is supported with the PCI104p2PMC.