PCIe4LXMCX1

Simple and easy to use. Install PCIe4LXMCX1 into your PCIe system to adapt an XMC card. The XMC can have bezel and or rear IO. Pn4 and/or Pn6 are supported with PCIe8LXMCX1. 8 lanes are routed from the PCIe gold fingers to the XMC position. XMC´s with up to 8 lanes can be used. The PCIe lanes to/from the XMC are routed per PCIe specifications with matched lengths and impedance control.

For superior performance PCIe4LXMCX1 has two cooling cutouts per position for increased airflow to the XMC´s. If your application requires a fan you can order PCIe4LXMCX1-FAN( ) to have fans mounted to your PCIe8LXMCX1. FAN positions are numbered 1-2, position 1 is closest to the PCIe Bezel [left edge in the picture above.] One fan can be mounted per position. Fans can be mounted to blow onto the XMC or to pull air from the XMC (R option.)

The -12V, 5V, and 3.3V for the XMC are regulated on board. The power supply designs utilize switching regulators controlling a MOSFET to convert 12V. An LC filter ensures clean power at the XMC. The Switch uses a small amount of 3.3 and power derived from 3.3V plus 1.0V derived from +12.. The PCIe gold fingers are rated for 1.1A each, and a total of 5.5A on the +12V rail. 55W are available to the XMC´s after power conversion. Please note this is the combined power requirement across the +12, -12, +5, and 3.3V power used by the XMC´s. In most cases 55W is sufficient. PCIe4LXMCX1 has a cable connector to allow additional 12V power to be added to the card. The two supplies are DIODE coupled. In some cases the 12V supply on the backplane will not be adequately routed by the PC causing voltage sag on the 12V. If this occurs use the cable connector to compensate.

The power supplies include the bulk capacitance to properly bypass the FET´s and post conversion voltage rails. In addition the XMC connectors are bypassed with a .1 uF capacitor at each power pin. The power supplies are checked with voltage monitor circuits. The LED´s are not illuminated unless the voltage is within the defined range.

A new feature for revision 03 and later boards is the addition of selection headers to control the power sequencing of the 3.3V and 5V supplies. Some embedded systems reach the enumeration state very rapidly. When operating in a system with fast enumeration the no delay mode should be selected. When operation is in standard setting and reducing the in-rush on the 12V supply is desired the delay mode selection is appropriate. When a power supply is not needed for your system; the power supply can be disabled to reduce in-rush requirements. For example when the installed XMC does not use the 5V. In addition the 3.3 and 5V supplies are upgraded to 15A each.

Three pin headers are supplied. When a shunt is installed in the delayed position the corresponding power supply is enabled based on a local timer and the 12V supply reaching an operating level. In the no delay position the power supply is enabled based on the 12V rail without the added delay. With no shunt installed the power supply is disabled. The revision 1 and 2 boards were effectively operating in the delay mode. Selection options exist to force the selection for users who do not want to be able to change the mode of operation.

The XMC specification calls out "VPWR " which can be either 12V or 5V. PCIe8LXMCX1 has FET switching and a header to allow user selection of either 12V or 5V or neither voltage to be supplied to these 8 pins [per XMC]. Build options are provided to allow "pre selected" voltages on these pins without the headers. The 12V and 5V supplied are part of the same power budget mentioned above. It is suggested the user select the rail definition most efficient for use, or alternatively based on noise the 5V will likely be quieter since it is converted on board and isolated from the 3.3V rail.

The individual pins on the Jn4 (PN4) or Jn6 connectors for each slot are accessible by either a 68 pin SCSI connector or a 64 position DIN connector. The IO are routed with matched length, impedance controlled differential traces suitable for single ended and differential operation. We recommend using our SCSI cable and the HDEterm68 breakout block with the SCSI connector. The industry standard VME IDC [DIN] connector is easy to connect to your system using DINterm64 which is a 64 position terminal strip and the DIN Ribbon Cable 64, a 64 position ribbon cable.

The XMC JTAG connections are routed to a header. Please let us know if you want this header installed. [-JTAG]

The PCIe bus does not have a concept of global addressing. A DIPSWITCH is provided to allow the user to select the Global Address on the XMC position.