PCI-Harpoon

PCI-Harpoon is a multi-functional board with capabilites for isolated measurement and control. The initial use of the PCI-Harpoon is to simulate - act as if the PCI-Harpoon was another piece of equipment. The simulation provides a means to test the rest of the equipment without requiring the real [expensive] asset. In addition the PCI-Harpoon can provide status and direct software control of the system.

The hardware is divided into 4 groups - channels. Each channel has the same capabilities and can function independently from the other channels.

Optical Isolation is used to allow for different ground potentials between the PCI-Harpoon and the connected equipment. 5 - 28V DC inputs are provided per channel. The limit resistor on each channel can be changed to provide alternate reference voltages. The base design has direct reister read status for each input. The FPGA can be updated to provide filtering, and/or operation in conjunction with the outputs using a state-machine.

High Side and Low Side Switches are provided. The High Side Switches provide switched power under software control. Each channel has two references that can be controlled with the 7 switches. Optically isolated FETs are utilized for the switching. 1.5A and 60V are the maximum values. The Low Side Switches use the same optically isolated FET and connect the external circuit to ground when enabled by software. The ground is referenced to the IO connector. The 4 channels can be isolated or tied together depending on system requirements.

RS-485 transceivers are provided for serial communication. The 6 transceivers per channel are matched length and differentially routed. Each transceiver has separate direction and termination controls. The termination control can switch in or out the 100 ohm parallel termination. Options for tri-state terminations are available along with the ability to default to a '1' or a '0' value on the differential lines.

The PCI-Harpoon can support multiple channels or group the transceivers together to make a parallel interface. The base design has a combined RX/TX capability. Three of the transceivers are allocated to RX, and 3 to TX on each channel. Data, Clock, and Enable are received to load new data into the PCI-Harpoon. Data can be automatically transmitted out based on the received Enable and Clock. A Master/Test mode feature is provided to allow local loop-back testing or to interface as a master for the bus. Interrupts are supported with programming options for the leading or trailing edge of the transmission.

Each channel has inputs to provide the testing of 115V AC. One 3 phase, and two single phase inputs are provided per channel. The 3 phase inputs can be used for 3 single phase signals if the nuetrals are common. The 115V inputs are transformer coupled [blue boxes in photo], rectified and tested to see if the 115V is present. The capacitor used with the DIODE bridge can be reduced in size to allow for frequency testing if that is desired. The output from the rectifier is optically isolated from the FPGA to provide protection.

PCI-Harpoon is a full size PCI card. The PCI interface is 32/33 and can support DMA. The base design is register accessed. The FPGA is a Xilinx Spartan 3 with plenty of uncommitted gates to expand capabilities and add new features. Windows® driver available. Cables, Breakouts, and custom cables available. Detailed Hardware and Driver manuals [PDF] available for download at the bottom of this page.