PMC-BiSerial-II-PS2
PMC Compatible 4 Bi-Directional Serial Data Interfaces




Please note that the PMC-BiSerial-II has been upgraded and the PMC-BiSerial-III is currently recommended for new designs

The PMC BiSerial-II PS2 is part of the PMC Module family of modular I/O components by Dynamic Engineering. The PMC BiSerial-II is capable of providing multiple serial protocols. The PS2 protocol implemented provides four full-duplex RS-422 interfaces with Data, Clock and Strobe signals plus an 8 bit parallel port with Change of State inputs. The channels are supported with 8 128 x 32 FIFOs built with Block RAM inside the FPGA. The external FIFOs have been removed, leading to a lower cost design with more channels. If your design does not require large FIFO capabilities and can use more channels this concept will be a good one for you. Please contact Dynamic Engineering for this design or a custom modification to meet your requirements.

PMC-BiSerial II-PS2 Block Diagram


The transmit data rate is derived from the 20 MHz on-board oscillator. external reference, or PCI clock clock. The selected reference has a programmable 12 bit divider to provide a range of user selectable frequencies. The clock is used to generate the transmit interfaces.

The FIFOs always operate at the PCI clock frequency of 33 MHz to simplify testing and operational functions. The state-machines operate at the Tx or Rx frequency with rate matching logic between the FIFOs and the state-machines.

Thirty-two differential I/O are provided for the signals. The drivers and receivers conform to the RS-485 specification (exceeds RS-422 specification). The RS-485 input signals are selectively terminated with 100Ω (82Ω resistor plus internal switch resistance). The termination resistors are in two-element packages to allow flexible termination options for custom formats and protocols. Optional pullup/pulldown resistor packs can also be installed to provide a logic 1 on undriven lines. The terminations and transceivers are programmable through the Xilinx device to provide the proper mix of outputs and inputs and terminations needed for a specific protocol implementation.

All configuration registers support read and write operations for maximum software convenience, and all addresses are long word aligned.

The PMC-BiSerial-II conforms to the PMC and CMC draft standards. This guarantees compatibility with multiple PMC Carrier boards. Because the PMC may be mounted on different form factors, while maintaining plug and software compatibility, system prototyping may be done on one PMC Carrier board, with final system implementation on a different one.

The PMC BiSerial-II uses a 10 mm inter-board spacing for the front panel, standoffs, and PMC connectors. The 10 mm height is the standard height and will work in most systems with most carriers. If your carrier has non-standard connectors [height] to mate with the PMC BiSerial-II, please let us know. We may be able to do a special build with a different height connector to compensate.

The Parallel Port is 8 bits wide. The IO are programmable to be 8 in , 8 out, or 4 in and 4 out. Each input can be programmed to operate with a Change of State [COS] detector to capture rising or falling edges. Each edge definition has a programmable interrupt associated with it for maximum flexability. The parallel data is also available in its natural form via a status port read.

Various interrupts are supported by the PMC BiSerial-II PS2. An interrupt can be configured to occur when a channel completes [Rx or Tx] or a COS event has occurred. Each interrupt is individually maskable. Interrupt conditions are held until explicitly cleared via software.

Further information including timing diagrams, register bit maps and descriptions, connector pinouts etc. are included in the hardware description manual. Please download the manual for your reference.

PMC-BiSerial-II-PS2 Serial Timing Diagram


If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface....
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Engineering Kits

PMC-BIS-II-PS2 ENG-1
Engineering Kit for PMC-BiSerial-II-PS2 includes: Board level Schematics [PDF], Reference Software [WinRT based ATP software [used to test the PS2 design in a windows environment], HDEterm68-MP, HDEcabl68

PMC-BIS-II--PS2 ENG-2
Engineering Kit for PMC-BiSerial II-PS2 includes: PCI2PMC adapter card, board level Schematics [PDF], Reference Software [WinRT based ATP software [used to test the PS2 design in a windows environment], HDEterm68-M, HDEcabl68


Related Products:

HDEcabl68 SCSI II/III Cable
HDEterm68 SCSI II/III to 68 pin terminal block
PCI2PMC PCI to PMC adapter card
PCIBPMC bridged PCI to PMC adapter card
cPCI2PMC cPCI to PMC adapter card 3U 4HP
PMC Extendio II PMC extension cable set - move your PMC up to 12" away from the host.


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PMC-BiSerial-II PS2 manual PDF


Custom, IP, PMC, PC*MIP, PCI, VME Hardware, Software designed to your requirements



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