PMC-Parallel-IO



Shown in IO configuration. Available With Bezel Only and Pn4 Only

In embedded systems many of the interconnections are made with single ended TTL or CMOS level signals. Depending on the system architecture an IP or a PMC will be the right choice to make the connection. With most architectures you have a choice as there are carriers for cPCI, PCI, VME, PC/104p and other buses for both PMC and IP mezzanine modules. Usually the choice is based on other system constraints as both the PMC and IP can provide the IO you require. Dynamic Engineering would be happy to assist in your decision making regarding architecture and other trade-offs with the PMC / IP decision. Dynamic Engineering has carriers for IP and PMC modules for most architectures, and is adding more as new solutions are requested and required by our customers.

If you are interested in an IP module solution please refer to the IP-Parallel-IO. In addition the updated PMC-Parallel-TTL and XMC-Parallel-TTL designs are available and recommended for new designs. PMC-Parallel-IO continues to be available to support previously integrated systems. IP, PMC and XMC carriers for PCI, PCIe and many other formats are available from Dynamic Engineering.

The PMC compatible PMC-Parallel-IO has 64 independent digital IO. The high density makes efficient use of precious PMC slot resources. The IO is available for system connection both through the front panel and via the rear [Pn4] connector. A high density 68 pin SCSI III front panel connector provides the front panel IO. The rear panel IO has a PIM and PIM Carrier available for rear panel wiring options. The HDEterm68 can be used as a breakout for the front or rear panel IO. The HDEcabl68 provides a convenient cable.

Each channel is programmable to be input or output on a channel-by-channel basis. Two IO channels can be used as interrupt generators. Interrupts are programmable to be based on level or edge and active high or low. An external clock and clock enable can be used or the internal clock selected for capturing the Input channels. The PCI clock can be divided by several programmable divisors to provide the right sampling rate for your application.

12 of the IO are routed through the Altera device [EPM7128] to allow for custom applications that require hardware intervention or specific timing. The Altera can be programmed via the convenient header and programming adapter. Please contact Dynamic Engineering for the development kit which includes the base design to allow for easy modifications to the hardware implementation. Dynamic Engineering can make the design changes for you if that is more convenient.

The registers are mapped as 32 bit words and support byte, word and 32 bit access. All registers are read-writeable. The Windows® compatible [XP/2000] driver is available to provide the system level interface for this design. Use standard C/C++ to control your hardware or use the Hardware manual to make your own software interface. The hardware manual is downloadable from the bottom of this page. The software manual is also available on-line.

64 IO in one slot
Block Diagram


PMC-Parallel-IO Features

  • Size
  • Single wide PMC.

  • Parallel Interface
  • 64 independent channels. Each channel can be an input or an output.

  • Pull-up Resistor
  • 470 standard, 1K, 4.7K available.

  • Sink Current
  • 64+ mA per channel

  • Cable interface
  • Industry standard SCSI III front panel IO and Pn4 backplane connection.

  • Software Interface
  • 2 - 32 bit registers mapped to the 64 IO channels. Byte, Word, Long writeable. Read-back of channel control registers and input registers. Read-write of control register for card configuration.

  • Interrupts
  • IO Channels 0,1 can be programmed to cause interrupts. Each channel is programmable to be masked, active hi, active low, edge triggered. Interrupts are mapped to INTA on PCI bus.

  • Power Requirement
  • +5V only.

  • Protection
  • All IO Channels are protected with Transorbs, and current limiting resistors.

  • External Clock
  • Input registers are programmable to capture data on the internal clock or external user supplied clock. Additionally an external clock enable input is provided to allow selective clocks to be gated at the register. SW can select internal or external source for clock and clock enable.

  • Internal Clock
  • The Input registers can be clocked with an internally generated clock derived from the PCI reference. The rate is programmable with ~8 MHz, 4, 2, 1, 500KHz, 250, 125, 64 selectable based on a 33 Mhz. PCI clock.

  • Control Bits
  • The upper 12 control bits are routed through the FPGA to allow for custom state-machine implementations.



    PMC-Parallel-IO Benefits

  • Speed
  • PMC-Parallel-IO is a software controlled HW interface. As fast as the PCI interface can push the data across, the outputs can change. With the Windows® driver several accesses per microsecond can be achieved. Your time to market will be shortened by the easy to use interface, flexability in design, and off-the-shelf availability.

  • Price
  • PMC-Parallel-IO has a low price point, and low integration cost for a low system cost. The PMC Parallel IO has an associated PIM and PIM Carrier which can lead to further savings in cPCI environments.

  • Ease of Use
  • PMC-Parallel-IO is easy to use. A point and shoot user interface to the IO. Please download the manual and see for yourself. The engineering kit provides a good starting point for a new user. 64 bits of user defined IO without the usual handicap of byte, word or other configuration boundaries for the data.

  • Availability
  • PMC-Parallel-IO is a popular board. PMC-Parallel-IO in stock. Send in your order and in most cases have your hardware the next day - delivered to you via FedEx. Custom versions can be dialed in quickly as well as customer requested VHDL features. PMC-Parallel-IO is one of our more frequently scheduled boards. Consider using scheduling on your next order.

  • Size
  • PMC-Parallel-IO is a standard single wide PMC [single slot] board which conforms to the PMC mechanical and electrical specifications. Eliminate mechanical interference issues.

  • PMC Compatibility
  • PMC-Parallel-IO is PMC compliant per the IEEE 1386 specification.

  • PCI Compatibility
  • PMC-Parallel-IO is PCI compliant. You can develop with a PCI /PCIe to PMC adapter - PCI2PMC or PCIeBPMCX1.


    Engineering Kits
    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. We recognize that different customers have different needs. The Engineering Kits are standardized in description to help with selection. The kits are segmented to allow for customers who only need hardware support, software support or a mixture. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.

    PMC-Parallel-IO-1 ..........Hardware Support Engineering Kit includes:
    Board level Schematics [PDF], cable and breakout [HDEterm68-MP, HDEcabl68].


    PMC-Parallel-IO Drivers..........Software Support Only Window®XP and 2000 compliant driver for the PMC-Parallel-IO:
    Please see the Driver manual for the specifics of installing and using the driver. The driver includes a user application reference which we use to test the boards. The user reference software, driver, and include files make it easy to integrate the PMC-Parallel-IO into your system. Please
    contact Dynamic Engineering if you would like us to produce one for your PMC or a third party design. Please note: Win7 and Linux drivers are available for the updated PMC-Parallel-TTL and XMC-Parallel-TTL version of the board.


    Ordering Information
    PMC Parallel IO 64 bit TTL interface with front and rear IO, 22 ohm isolation resistors front and 0 ohm resistors rear
    PMC Parallel IO -CS 64 bit TTL interface with rear IO only and 33 ohm series resistors on rear IO
    PMC Parallel IO -FP 64 bit TTL interface with bezel IO only and 22 ohm series resistors on rear IO
    PMC Parallel IO -ET 64 bit TTL Extended Temperature -40 - +85C

    To include a drive or Engineering kit w/order please select from below:


    Quantity


    Manuals
    Download the
    PMC-Parallel-IO Rev J Manual 2/29/16 in Adobe Acrobat PDF format.
    Download the PMC-Parallel-IO XP Driver Manual rev A 11/9/04 in Adobe Acrobat PDF format.
    Download the PLX 9052 Manual in Adobe Acrobat PDF format.

    Related Products
    HDEcabl68 SCSI II/III Cable
    HDEterm68 SCSI II/III to 68 pin terminal block
    PCI2PMC adapter card
    PIM-Parallel-IO facilitate rear panel IO


    Client System Example
    ION - Concept Systems chose the PMC-Parallel-IO to integrate into their
    PowerRTNu and PowerRTNU II systems. ION´s Concept Systems subsidiary is a world leader in real-time navigation and data integration software and services. Concept Systems offers an integrated family of products addressing the command and control requirements of 2D, 3D and 4D seismic surveys in the marine environment, including both towed streamer and seabed operations. For more information on their product please use the link [product name]. ION - Concept Systems is located in Edinburgh, Scotland.

    PowerRTNU II with new PowerRTNu on top - utilizing PMC Parallel IO


    Custom, IP, PMC, XMC, PCIe, PCI, PCI-104, PCIe104, cPCI, VPX, VME Hardware, Software designed to your requirements



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