PCI3IP



3 position PCI IP Carrier, PCI IP Adapter, PCI IndustryPack® carrier, PCI IndustryPack® Adapter for IP modules
Updated Design





PCI3IP is part of the IP Compatible family of modular I/O components. PCI3IP provides three IndustryPack® module sites in one PCI slot. PCI3IP acts as an adapter, converter, carrier, or bridge between the PCI bus and your IndustryPack® hardware. PCI3IP is a half size PCI card compatible with the smallest chassis and the tallest processors that prevent full size solutions.

PCI3IP is supported with Windows® compliant [WDM32] drivers for XP and 2000 and WDF drivers for Win7 etc. as well as Linux support. The drivers come with a generic IP driver to allow use with "unknown" IP´s <=> IP´s that do not have a driver designed yet. For example, third party IP´s.

Each slot has a separate clock controller for 8 and 32 MHz operation. The clocks are locked together with a DCM, allowing glitch free operation, and the frequency to be changed on the fly. The state-machine within the bridge design automatically locks to the IP Slot frequency at the start of each access.

A new addition to the design of the PCI3IP is to tag all accesses from the PCI bus. IP Modules can take longer than the PCI response specification leading to the use of retry cycles on the PCI bus. In a single CPU system the retry accesses are done serially. The current IP access will be the correct one to respond to the retry access. In a multi-CPU system it is possible to get out of sequence accesses, and potentially have the IP response sent to the wrong retry access. By storing the PCI parameters for the IP access and only responding to the correct retry cycle; multiprocessor cross contamination is avoided. This feature is new with the revision J PROM. Revision J PROM´s can be obtained from Dynamic Engineering should you need to upgrade previously fielded HW for use in multiprocessor systems.

Each slot has "self healing" fused, filtered power. The power is distributed with separated power planes to provide isolation between the slots.

Industry standard 50 pin [ribbon cable] headers are used with the IO connectors. Vertical connectors are provided in all positions. Ribbon cable or discrete wire cables can be interfaced directly with the PCI3IP. Alternatively the HDRterm50 can be used to create a terminal block interface. An ordering option for Ejectors to be mounted to the headers is available. This is not the default option due to PCI height restrictions. A recommended upgrade if your system has the room. "-EJ" With the revision 05 fab, the headers are all located on the left edge of the board next to the bezel. Better airflow to the IP´s is achieved with this arrangement. Also new with the revision 05 fab is the Ribbon Cable Bezel. The bezel now has a cut-out to allow the ribbon cables to be brought outside of the chassis without requiring an extra slot in the chassis. The blank bezel is available by adding "-BB" to the part number.

Slots B and C are configured to accept two single IP´s, or a double wide Industrypack compatible design. Slot A is available for single IP´s.

A local reset switch is provided for the IP boards. In addition the IP´s can be reset from the control register within the Xilinx via the software interface.

LED´s are provided to each of the three IP slots for activity indicators. When each slot is accessed the LED is flashed. The FPGA provides a "one shot" circuit to stretch the "on" time to make it visible. Power indicator LED´s are provided on slot A. An additional six user LED´s are available for debugging or other purposes.

A surface mount "dip switch" is available for configuration control or debugging purposes. The switch values are available to be read via the PCI bus. The switch is used for deterministic control by the driver. When multiple carriers are used in the same system the switch is used to allow the driver and application software to "know" which carrier maps to which handle. Further the slot information for a particular IP is stored to create a "vector" pointing to a specific slot on a specific carrier. Deterministic control of specific interfaces is easily achieved with this system without hardwiring system data into your software. The application software will be more portable and not break when new assets are added to the system (and your PCI addresses change).

IndustryPacks are 16 bit devices and the PCI bus supports 32 bits. The PCI3IP accepts 32 bit PCI accesses and converts them into two 16 bit accesses. The IP accesses can be auto-incremented or static address accesses. With the static access option the upper or lower word can be accessed twice. With auto-incremented addresses both words are read from or written to. One PCI access can be used to write to or read from two IP locations. Our clients have measured a 50% speed improvement from the use of the long word access to the IPs. Byte, Word and Long Word accesses are supported to the IP sites from the PCI bus.

The IP accesses are protected by a watch-dog timer. The timer is started at the beginning of each IP access. If the timer expires before the IP being accessed responds, a bus error internal to the PCI3IP is created. The PCI3IP responds normally to the host, not tying up the PCI bus, and provides status and an optional interrupt to alert the host to the problem with the IP. The Bus Error timer is useful in situations where the software may want to cause a bus error to find out what is installed or where a hung system would have consequences.

Connector positioning is compatible with IP-Debug-Bus will allow the user to isolate and debug the control interface of an IP. The IP-Debug-IO can be used in conjunction with the PCI3IP and IP-Debug-Bus to provide test-points on the IO signals and loop-back capability for the IP.

The PCI3IP has an alternate "mini-map" option available. The standard design provides the full address space to the IP Memory space. The mini-map provides a minimized memory space equal to the ID, IO, and INT spaces with 128 bytes. The total PCI memory space is reduced to 2K with this option. Please download the alternate manual to get the address map and other details. Please order with the -MM option for the mini-map.

With the 05 fab and going forward the PCI3IP is now an extended temperature board standard. The extended or "Industrial Temp" version has components rated for -40C to +85C minimum. This temperature range will need to be derated based on your chassis thermal situation.
PCI3IP Features 10-1999-0405 and later

  • Size
  • Half size PCI card.

  • IP compatible slots
  • 3 independent slots. Slot B and C can be used together for a double wide IP

  • Clocks
  • Each slot has independent selection of 8 and 32 MHz operation. Clock selection can be changed on-the-fly with glitch free operation. Bridge function auto-synchronizes with the slot clock for each access.

  • Access Width
  • Each slot can be accessed as byte, word, or long word. Long word accesses can be static or auto-incrementing to the IP slot.

  • Bus Error
  • The Watch-Dog timer protects against PCI bus hangs by responding when the IP is not installed or has a failure. 7.3 uS timeout.

  • Cable interface
  • Industry standard 50 pin box header connectors. Vertical mount.

  • Software Interface
  • Control registers are read-writeable
    IO, ID, MEM, INT spaces supported.
    Windows® and Linux Drivers available

  • Interrupts
  • Each IP has 2 potential interrupts. All 6 are routed to INTA on the PCI bus. Control registers are provided to determine the source of the interrupt

  • Power Requirement
  • +5V internally, +5V, +12V, -12V current determined by IP´s installed

  • LED´s
  • +5V, +12V, -12V and activity LED´s. 8 user LED´s also available.

  • DIP switch
  • An 8 position switch is available to allow for configuration control, or to facilitate debugging, and to provide a positive ID of each PCI3IP in your system

  • Reliability
  • 1.322 million hours. Bellcore. GB 25c


    PCI3IP Benefits

  • Speed
  • With the direct PCI to IP Bridge design featured in the PCI3IP the access to your hardware happens faster than in competing designs. The 32 bit access capabilities further extends the lead in speed. Our clients report a 50% improvement using the 32 bit access feature compared to not using it on the PCI3IP. Now compatible with mult-processor systems without sacrificing access times for single CPU systems. Multiple threads with accesses to different IP´s are supported.

  • Price
  • System level cost is best when reasonably priced reliable hardware is used and NRE minimized. With the PCI3IP, driver support for the carrier and IP level, reference software, history of reliable operation, and fantastic client support your cost per unit and overall costs are attractive. Please check the current per item pricing with the storefront lower on this page. Orders can be placed via the on-line ordering system or via phone / email PO order systems.

  • Ease of Use
  • The PCI3IP is easy to use. A point and shoot user interface to the IP sites. Please download the manuals and see for yourself. The engineering kit provides a good starting point for a new user. Reference software is provided in source form to get you started. The generic IP interface allows the driver to be used with IP´s without a driver specific to that design.

  • Availability
  • The PCI3IP is a popular board. We keep the PCI3IP in stock. Send in your order and in most cases have your hardware the next day. We can ship with FedEx pick-up everyday and other carriers as requested.

  • Size
  • PCI3IP is a half size PCI board which conforms to the PCI mechanical and electrical specifications. Eliminate mechanical interference issues. The PCI3IP can be used in all PCI slots including narrow chassis.

  • IP Compatibility
  • PCI3IP is IP compliant per the VITA 4 - 1995 specification. All Dynamic Engineering IP Modules are compatible with the PCI3IP. All other IP Modules which are compliant with the VITA specification can be expected to work. ID, IO, INT, and Memory spaces are supported in all 3 positions. The -MM option reduces the overall PCI address space requirement for those designs not using the full IP Memory space.

  • PCI Compatibility
  • The PCI3IP is a universal voltage, PCI compliant device. The PCI3IP can be expected to work in any PCI compliant backplane. The PCI3IP has been tested in multiple active and passive backplanes from Advantech, Dell, Intel, Apple Computer and other manufacturers. The PCI3IP has been tested in expansion chassis by SBS. Recently tested in multi-processor industrial chassis.


    Ordering Information
    PCI3IP
    options:
    Industrial Temperature parts for wider temperature range. -40 <=> + 85C. now standard.
    -BB Option to have a bezel without a cut-out to facilitate cable egress from the IP Modules. The Ribbon Cable Bezel is standard.
    -ROHS: Option to order boards with ROHS processing instead of the standard "traditional" assembly. Affects solder and some components.
    -EJ: Option to add ejectors to headers for positive locking and easy extraction of ribbon cables. Default is not installed due to PCI height limitations. Recommended for end slots or other situations where height restrictions won´t apply.
    -CC Option to add conformal coating

    To include a Hardware Engineering kit with your order select from below.

    Quantity


    Engineering Kits
    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. We recognize that different customers have different needs. The Engineering Kits are standardized in description to help with selection. The kits are segmented to allow for customers who only need hardware support, software support or a mixture. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.


    PCI3IP Drivers .......... Software Included with board order Win7, Win®XP & 2000 and Linux compliant drivers for the PCI3IP:
    PCI3IP-XP/2000 Win®XP & 2000 driver for PCI3IP. The driver is designed to be overlayed with individual IP Module(s) driver(s). Please see the Driver manual for the specifics of writing your board interface.
    Please contact Dynamic Engineering if you would like us to produce one for your IP or a third party design.


    Please select between the Linux and Windows drivers for your engineering kit, referring to the individual IP pages for driver availability. We are working on drivers for most of our IP´s and you can influence the order in which we complete them by letting us know which ones you need first! Please contact Dynamic Engineering if you would like us to produce a driver for your IP or a third party design.

    Manuals
    Download the
    PCI3IP Manual 4/2/15 in PDF format. For 06 and later boards. Please contact Dynamic Engineering if you need a previous revision manual.
    Download the PCI3IP mini-map Manual 5/22/02 in PDF format.
    Download the IP Carrier Windows®7 manual. For PCIe and PCI based carriers
    Download the Win7 Generic IP Driver Manual in PDF format.
    Download the Carrier Group Linux Manual in PDF format.
    Download the Generic IP Driver for Linux Manual in PDF format.

    Use the Generic driver when a custom IP driver is not available. The generic driver is included with the PCI3IP-XP/Win7 and Linux drivers along with a sample user application making calls to the generic driver and an IP-Parallel-TTL.

    Please refer to the individual IP pages for driver availability. We are working on drivers for most of our IP´s. You can influence the order in which we complete them. Please let us know which one you need first!

    Please contact Dynamic Engineering if you would like us to produce one for your IP or a third party design.


    Related Products
    PCI3IP Driver Win®XP & 2000 Drivers for PCI3IP. Win7 also available with a similar operational concept.
    IP-DEBUG-IO II IP IO Connector Break-out Adapter
    IP-DEBUG-BUS IP module extender specialized for debugging
    HDRterm50 50 position terminal block with ribbon cable connector
    HDRribn50 Ribbon Cable for IP Modules with strain relief and cable pull tab
    IP-MTG-KIT Mounting Hardware for IP Modules


    Try before you buy program

    Custom, IP, PMC, XMC, PCI, PCIe, VME, VPX, PC104p Hardware, Software designed to your requirements


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