PC104p4IP



PC/104+ card with 4 IP slots

If you want to use IndustryPack® modules with your PC104p or PCI-104 system, the PC104p4IP is the choice for you. The PC104p4IP combines features you need with simplicity and speed. Up to 4 IP modules can be installed. Standard 16 bit IPs plus 32 bit, and double wide modules fit right in. Each slot has independent operation - control, clocking, IO, power filtering and protection. The PC104p4IP is highly integrated with the PCI and IP interfaces closely coupled within the same FPGA. As a result the PC104p4IP is faster, has a higher MTBF, and is easier to use than competing designs. There are fewer initialization steps and fewer PCI addresses to deal with and yet there are more features to work with. With the Windows®XP/2000 driver; operation can be "plug and play". Linux is available too.

A typical system might have a PCI-104 CPU with Power supply in the PC104p stack and special purpose IO in the IP positions. PC104pPWR, PC104pCOOL [Fans], PC104pRPP [Reverse Power Protection and fan] are available options to support the PC104p side of the design. IP-1553, IP-429, IP-Parallel with TTL and/or Differential IO, IP-Reflective Memory and many more modules are available. A small, rugged system can be achieved in this manner. For more information on the above cards please use the menu system to navigate.

Our customers are our best source of feed-back and new ideas to implement. The PC104p4IP is now revision B for the PROM. The Revision B PROM has added support for the Dynamic Engineering Carrier Driver; Added interrupt status within each slot control register. Revision A featured Byte and Word Swapping, Bus error status for each slot independently, and 32 IP support. Shipping now. If you have PC104p4IPs and want to update to the latest firmware we have a PROM update program. A minimal cost of $25 for the first updated PROM. Please provide your serial number(s) to be updated along with your PO.

Multi-board operation is supported. With multiple PC104p4IP´s in your system and unique cabling, sensors etc. for each slot on each PC104p4IP it is important to "know" which PC104p4IP is which, and to properly control the IP modules mounted to them. A surface mount "dip switch" is provided to create an identifier for the software. A specific PC104p4IP can be matched with the PCI address allocated for deterministic control. The switch can also be used for other purposes; configuration control or debugging for example. The switch values are available to be read via the PCI bus.

Each slot has a separate clock controller for 8 and 32 MHz operation. The clocks are locked together for the four slots plus the state-machine. Glitch free operation means the frequency can be be changed on the fly. Series and parallel terminations with equal length traces insure clean clocks and coherant operation across the 4 IPs and the controlling state-machine. A well designed clock distribution is critical for reliable operation.

Each slot has resettable "self healing" fused filtered power. +5, +12, and -12V supported.

Industry standard 50 pin [ribbon cable] headers are used with the IO connectors. Vertical connectors are provided in all positions. Ribbon cable or discrete wire cables can be interfaced directly with the PC104p4IP. The traces between the IP IO connector and the PC104pIP IO connector have matched length [within .002"] for each slot independently. Slots B and D, C and E have similar lengths. The HDRterm50 can be used to create a terminal block interface.

Slots B/C and D/E are configured to accept two single IPs, or a double wide Industrypack compatible design. The data bus is designed to allow for 32 bit IP Bus operation. The data bus width is controlled by the address range the slot is controlled with. Automatic switching makes it possible to switch data bus size without changing the control registers for seamless operation.

Three methods of resetting the IPs are built into the PC104p4IP. A local pushbutton reset switch is provided. The IPs can be reset from the control register within the FPGA via the software interface. The IPs are reset on power-up via a supervisory circuit that guarantees the 200 mS minimum reset requirement in the IP specification. The resets only affects the IP slots.

LEDs are provided to each of the four IP slots for activity indicators. When each slot is accessed the LED is flashed. The Xilinx provides a "one shot" circuit to stretch the "on" time to make it visable. Power indicator LEDs [3] are provided. An additional eight user LEDs are available for debugging or other purposes.

IndustryPacks are usually 16 bit devices and the PCI bus supports 32 bits. The PC104p4IP accepts 32 bit PCI accesses and converts them into two 16 bit accesses with an auto-incremented or static address. One PCI access can be used to write to or read from two IP locations or twice to one location. Byte, Word and Long Word accesses are supported to the 16 and 32 bit IP sites from the PCI bus. If a 32 bit IP has been installed then direct 32 bit operation can be utilized.

The IP accesses are protected by a watch-dog timer. The timer is started at the beginning of each IP access. If the timer expires before the IP being accessed responds, a bus error internal to the PC104p4IP is created. The PC104p4IP responds normally to the host, not tying up the PCI bus, and provides status and an optional interrupt to alert the host to the problem with the IP. The Bus Error timer is useful in situations where the software may want to cause a bus error to find out what is installed or where a hung system would have consequences. Multi-threaded software operation is supported with separate bus error status in each of the slot control registers.

The PCI bus is defined as little endian and many IPs have their register sets defined to operate efficiently with a little endian interface. The default settings on the PC104p4IP are "straight through" byte for byte and D15-0 written to address 0x00 before D31-D16 written to address 0x02 when long words are written to 16 bit ports. Please note that any long word address can be used. The lower data is written to the lower address first, then the upper data to the upper address. Each slot has a ByteSwap and WordSwap control bit to allow Byte and Word Swapping to be performed to accommodate alternate IP and OS requirements.


Byte Swapping accesses to a 16 bit port.


Byte Swapping access to a 32 bit port


Connector positioning is compatible with IP-Debug-Bus to allow the user to isolate and debug the control interface of an IP. The IP-Debug-IO can be used in conjunction with the PC104p4IP and IP-Debug-Bus to provide test-points on the IO signals and loop-back capability for the IP.

PC104p4IP Features

  • Size
  • PCI-104 / PC104p card with extension for IP modules. See downloadable PDF for mechanical data.


  • IP compatible slots
  • 4 independent slots. Slots B/C and/or D/E can be used together for a double wide or 32 bit IP


  • Clocks
  • Each slot has independent selection of 8 and 32 MHz operation.


  • Access Width
  • Each IP Module slot can be accessed as byte, word, or long word. Long words are converted to double word accesses for 16 bit slots.


  • Bus Error
  • The Watch-Dog timer protects against PCI bus hangs by responding when the IP is not installed or has a failure. 7.3 uS timeout.


  • Cable interface
  • Industry standard 50 pin box header connectors. Vertical mount.


  • Software Interface
  • Control registers are read-writeable
    IO, ID, MEM, INT spaces supported.
    Windows® XP/2000 and Linux drivers available.


  • Interrupts
  • Each IP has 2 potential interrupts. All 8 are routed to INTA on the PCI bus. Control registers are provided to determine the source of the interrupt


  • Power Requirement
  • +5V internally, +5V, +12V, -12V current determined by IPs installed


  • LEDs
  • +5V, +12V, -12V and activity LEDs. 8 user LEDs also available.


  • DIP switch
  • An 8 position switch is available to support multi-board operation or other user defined purposes.



    PC104p4IP Benefits

  • Speed
  • With the direct PCI to IP Bridge design featured in the PC104p4IP standard accesses to your hardware happen faster than in competing designs. Throughput is increased by an additional 50% when the 32 bit access mode is used. Fantastic for loading memory etc.


  • Price
  • The PC104p4IP has the low price point.


  • Ease of Use
  • The PC104p4IP is easy to use. A point and shoot user interface to the IP sites. Please download the manual and see for yourself. The engineering kit provides a good starting point for a new user.


  • Availability
  • The PC104p4IP is a popular board. We keep the PC104p4IP in stock. Send in your order and in most cases have your hardware the next day - delivered to you via FedEx.


  • Size
  • The PC104p4IP is a full size PC104p / PCI-104 board with an added area where the IPs are mounted. The mechanical outline and mounting holes are detailed in a PDF - see the download section.


  • IP Compatibility
  • The PC104p4IP is IP compliant per the VITA 4 - 1995 specification. All Dynamic Engineering IP Modules are compatible with the PC104p4IP. All other IP Modules which are compliant with the VITA specification can be expected to work.


  • PCI Compatibility
  • The PC104p4IP is universal voltage, PCI compliant device. The PC104p4IP can be expected to work in any PCI compliant backplane.


    Ordering Information
    PC104p4IP

    Quantity

    Engineering Kits
    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. We recognize that different customers have different needs. The Engineering Kits are standardized in description to help with selection. The kits are segmented to allow for customers who only need hardware support, software support or a mixture. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.

    PC104p4IP-HW .......... Hardware Support Engineering Kit includes:
    Board level Schematics [PDF], IP debug support [IP-Debug-Bus, IP-Debug-IO].

    PC104p4IP-ENG .......... Hardware Support plus Driver Engineering Kit includes:
    Board level Schematics [PDF], Software [PC104p4IP Windows® Driver and sample application zip file ], IP debug support [IP-Debug-Bus, IP-Debug-IO].

    PC104p4IP-DRV.......... Software Support Only Windows®XP/2000 and Linux compliant drivers for the PC104p4IP:
    Please see the manuals [below] for the specifics of installing and using the driver. The drivers include a user application reference which we use to test the boards. The user reference software, driver, and include files make it easy to integrate the PC104p4IP into your system. The driver is designed to be overlayed with individual IP Module(s) driver(s). Please see the Driver manual for the specifics of writing your board interface. A generic IP module is included with the driver to allow for third party modules without an individual IP driver. Please
    contact Dynamic Engineering if you would like us to produce one for your IP or a third party design. Please contact Dynamic Engineering if you would like us to produce one for your IP or a third party design.


    Manuals
    Download the
    PC104p4IP Manual in PDF format.
    Download the IP Carrier Windows®7 manual. For PCIe and PCI based carriers
    Download the Win7 Generic IP Driver Manual in PDF format.
    Download the Carrier Group Linux Manual in PDF format.
    Download the Generic IP Driver for Linux Manual in PDF format.

    Use the Generic driver when a custom IP driver is not available. The generic driver is included with the XP/2000 and Linux drivers along with a sample user application making calls to the generic driver and an IP-Parallel-TTL.

    Please refer to the individual IP pages for driver availability. We are working on drivers for most of our IP´s. You can influence the order in which we complete them. Please let us know which one you need first.

    Download the PC104p4IP Mechanical in PDF format.

    Related Products
    IP-DEBUG-IO IP IO Connector Break-out Adapter
    IP-DEBUG-BUS IP module extender specialized for debugging
    HDRterm50 50 position terminal block with ribbon cable connector
    HDRribn50 Ribbon Cable for IP Modules with strain relief and cable pull tab
    IP-MTG-KIT Mounting Hardware for IP Modules
    PCI2PC104p PCI adapter for PC/104p modules - use the PC104p4IP within a PCI chassis. Great place to start integration before moving to the PC104 stack environment


    Try before you buy program


    Custom, IP, PMC, XMC, PCIe, PCI, VPX, VME, cPCI, PCIe104, PCI-104 Hardware, Software designed to your requirements



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