IP Crypto
IP Crypto


IP Crypto Timing Diagram
IP Parallel HV Timing Diagram


The IP Crypto is a special version of the IP-Parallel-HV. The basic design features are retained and an interface to a KYK-13 is provided. The original KYK-13 interface uses the 6.5V reference output, a transfer request output, and 3 inputs for clock, data and switch. The outputs for the general purpose section are reduced to 23 in number. The inputs are all available through the filter or after processing by the KYK-13 interface. The crypto data is protected with an auto-delete erasure - data is cleared with an approved multiple pass algorithm, if the the data has not been read within a short period of the data request. Please see the manual for more details.

The standard IP Parallel HV is a High Voltage IP Compatible card with 48 programmable IO. 40 mA sink. Open collector interface. Interrupt generator on each input channel. filtered or direct input. The IndustryPack compatible IP-Parallel-HV design can handle up to 30V external signals. The standard card configuration is a 6.5V reference and the ability to supply or accept an external reference. The internal supply is DIODE protected allowing direct connect of external [higher] voltages. Other voltages are available. We have recently added 5.85V as a standard reference to support newer Crypto interfaces which implement the KYK-13 bus at a lower voltage.

Use the IP Crypto to read your key and control your system. Perfect for your embedded control.


The IP Module driver can be instantiated multiple times to control multiple cards by the same CPU. IP-Crypto when coupled with the Dynamic Driver "knows" what slot it is in and which carrier it is installed into. The slot and carrier information is required when using multiple cards in a PCI system with dynamic address assignment. A known system configuration can be combined with the slot and carrier information to deterministically access the right card

PCI implementations can be done with the PCI3IP and PCI5IP. Applications from 1 to 5 KYK-13 IF per PCI slot.
PCIe is supported with the PCIe3IP and PCIe5IP. Applications from 1 to 5 KYK-13 per PCIe slot.
cPCI 3U is supported with the cPCI2IP. Applications with 1 or 2 KYK-13 IF per 3U cPCI slot.
cPCI 6U is supported with the cPCI4IP. Applications from 1 to 4 KYK-13 IF per 6U cPCI slot.
PC104p is supported with the PC104pIP. Applications with 1 KYK-13 IF per PC104 stack position.
PC104p situations with a custom mechanical can be done with the PC104p4IP.
Applications from 1 to 4 KYK-13 IF per PC104 stack position.
3U VME is supported with the VME2IP. Applications with 1 or 2 KYK-13 IF per 3U VME slot.
6U VME is supported with the VME4IP. Applications from 1 to 4 KYK-13 IF per 6U VME slot.

IP Parallel HV Block Diagram
IP Parallel HV Block Diagram


Please download the manual [see bottom of page] for more information.

IP Crypto Features

  • Size
  • Single wide IP, Type 1

  • Parallel Interface
  • 24 open collector outputs. 40 mA sink. 30V max. voltage, 6.5V reference STD. Other voltages up to 12V are optional. 24 inputs. Resistor divider provided. 6.5V and 5.85V versions. Other combinations are available

  • Pull-up Resistor
  • 470 ohm on upper 8 bits, 1K ohm on lower 16 bits is standard


  • Software Interface
  • 16 bit registers mapped to the IO channels. Word writeable. Read-back of channel control registers and input registers. Read-write of control register for card configuration.


  • Interrupts
  • All input channels can be programmed to cause interrupts. Each channel is programmable to be masked, active hi, active low, edge or level sensitive. -End of transfer, -End of clear. Interrupts are mapped to INTR0n on IP bus

  • Power Requirement
  • +12, +5

  • Protection
  • All IO Channels are protected with current limiting resistors.


  • Custom
  • There is room in the FPGA for custom applications that need IO. Send in your specifications and we can quote a custom version for you

  • MTBF
  • Belcore 25c GB 1.855 Million Hours





    IP Crypto Benefits

  • Speed
  • Direct mapped IO, efficient IP interface, and dual IP bus speed compatibility provide an optimised interface.

  • Price
  • The IP-Crypto is inexpensive and can save money in other ways too. The IP Crypto can take the place of other IPs with its combination of parallel IO and transfer mode KYK-13 interface; save slots, save money, save time.

  • Ease of Use
  • The IP-Crypto is easy to use. A point and shoot user interface. Please download the manual and see for yourself. The engineering kit provides a good starting point for a new user.

  • Availability
  • The IP-Crypto is a popular design. We keep the IP-Crypto in stock. Send in your order and in most cases have your hardware the next day - delivered to you via FedEx. We can make custom versions with alternate reference voltages quickly too.

  • Size
  • The IP-Crypto is a standard size IP module. Combining the High Voltage Parallel IO and transfer mode crypto interface can save slots. The Xilinx has "extra" room. A customized version could do even more to reduce your system size.

  • IP Compatibility
  • The IP-Crypto is IP compliant per the VITA 4 - 1995 specification. All Dynamic Engineering IP Modules are compatible with the PCI3IP, PCI5IP, cPCI2IP and other Dynamic Engineering designed carriers. The IP-Crypto will also be compatible with other carriers which are compliant with the VITA specification.


    Ordering Information
    IP-Crypto - Standard interface with 6.5V reference
    5.85 - Interface with 5.85V reference
    Please note: Standard software is included with purchase. IP Module driver/UserAp requires separate Carrier driver to operate. Carrier driver is included with Dynamic Engineering IP Module carriers. UserAp reference SW includes demonstration applications which use the Driver calls to control the HW. For example, most devices allow some sort of loop-back, interrupt usage etc. For special versions of drivers, or for coverage of alternate OS types please contact Dynamic Engineering. Support packages are available should you want
    integration support.


    Quantity

    Quantity discounts available


    Engineering Kits
    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I.
  • The following products will assist in initial integration of your IP Module. The Debugging tools can be used with any IP module.
    IP-Debug-IO IP IO connector T&I tool. When IP is mounted to the carrier using the Debug Bus tool, this device allows the user to connect to the IO connector. Connection to the external system or for loop-back.
    IP-Debug-Bus IP Extender card with test points, hot swap capability, power monitoring. Connect your IP to the carrier and have access to the IP interface signals. Handy for debugging SW - is the interrupt set at the module when it is not seen at the system? etc.
    HDRterm50 50 pin ribbon cable to terminal strip converter DIN rail mounting.
    HDRribn50 50 pin ribbon cable. Available in user selected lengths.



    Manuals
    You must have Adobe Acrobat to read our PDF files.
    Download the
    IP-Crypto Manual updated 8/28/09
    Download the IP-Crypto Windows¨ Driver Manual updated 2/17/04


    Related Products
    Cable_Assem_Crypto/Tape PCI Bezel Connector for IP-Crypto and IP-Tape.
    IP-Debug-IO IP IO connector T&I tool,
    IP-Debug-Bus IP Extender card with test points, hot swap capability, power monitoring,
    HDRterm50 50 pin ribbon cable to terminal strip converter DIN rail mounting,
    HDRribn50 50 pin ribbon cable,
    PCI3IP 3 IP Module Carrier in 1/2 width PCI card,
    PCI5IP 5 IP Module Carrier in full width PCI card,
    cPCI2IP 2 IP Module Carrier in 3U cPCI card,
    PC/104pIP 1 IP Module Carrier in PC/104p card,
    IP-MTG-KIT stainless steel screws and standoffs to mount an IP to a carrier


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