PMC Compatible Reprogrammable Logic with LVDS and-or RS-485 differential IO "DIFF"

  • DMA on all channels
  • PMC with User FPGA supported with software reload and FLASH
  • Universal voltage 32 / 33 PCI interface with DMA support
  • User programmable PLL
  • Optional 1M x 36 RAM
  • 34 LVDS and or RS-485 IO types
  • Independent Programmable Termination and Direction per IO.
  • Temperature Sensor
  • Bezel IO and Rear IO
  • 1 year warranty standard. Extended warranty available.
  • ROHS and Standard processing available

Do you need to develop your own Xilinx implementation and prefer to use a COTS solution for the board? PMC-XM-DIFF is part of a family of user defined, reprogrammable FPGA based designs from Dynamic Engineering. PMC-XM-DIFF is designed to support clients who need to control the FPGA and their application uses differential IO. The IO is defined with transceivers using an SO8 package with multiple common footprint devices allowing for RS-485 and LVDS. Each IO has a separate Direction line and a dedicated analog switch to allow for termination control.

Each IO are resistor isolated from the front and rear connectors to allow front or rear operation without creating bus stubs. Each of the differential pairs is properly matched and impedance controlled. All of the IO to the front or rear panels are also matched against each other for "no skew" other than that introduced by the system cabling and active devices. 34 differential pairs are available at the front panel and/or 32 at Pn4.

The transceivers are interconnected with the Virtex FPGA to allow user control over the IO. The user FPGA [Virtex XC4VSX35/ XCVLX60] is supported on many levels to make the user design implementation as easy as possible. FLASH is supplied along with a JTAG programming method to implement auto loading applications or for a default initialization of the Virtex. The Virtex can also be loaded [or over-written] using software.

The base design includes the PMC/PCI interface with DMA. The Spartan III FPGA implements the board level decoding to allow control over the loading of the Virtex, DMA into and out of the board, memory to support DMA, and an arbitration unit to allow multiple DMA channels to be implemented. The Virtex device is further supported by an optional 1M x 36 QDR SRAM, PLL, Digital Temperature Sensor. Four LED´s are supplied to the Virtex to provide design status, debugging support and other user purposes.

The Xilinx Virtex FPGA has the right combination of speed, space, memory, and features to implement many embedded projects. A summary of the XC4VLX60 capabilities:
8 DCM [Digital Clock Manager] used for clock control, synthesis, phase shifting.
4 PMCD : Phase Matched Clock Divider
Clock Buffers: multiple external and internal sources can be routed with low skew buffers
160 blocks of Block RAM : each 18 Kbits
64 Extreme DSP slices: each with 18x18 multiplier, adder, and accumlator
Additional 416 Kbits of distributed RAM
59,904 Logic Cells

To make integration easy an engineering kit is available. The engineering kit has a base "footprint", written in VHDL. A windows® driver is also part of the engineering kit. Frequently clients ask Dynamic Engineering to do the initial programming for their project and then deliver a custom engineering kit with the initial implementation, custom driver and manuals to them. In this state the client can do the maintenance or add features while taking advantage of Dynamic Engineering´s expertise and familiarity with PMC-XM-DIFF.

The VHDL defined design can have any type of interface that the user wants. In the BiSerial version of the design Dynamic Engineering has implemented Manchester, Miller, Telemetry, specialized command/control, UART, SDLC and other protocols. Any of the BiSerial designs can be ported to the PMC-XM-DIFF as part of a custom implementation for your requirements. Alternatively you can implement or port existing design work to the PMC-XM-DIFF. The channelized architecture isolates the IO control from the bus control making it easy to port design work in or out.

DMA can be used to move data from the system memory to local storage within the FPGA and vice-versa. The PCI bus is 32/33 universal voltage. The interconnection between the PCI FPGA and the user FPGA is also 32 bits and operates at 33 MHz. Two channels of TX and two channels of RX DMA are supported plus standard PCI target accesses. An arbiter within the PCI FPGA takes care of monitoring the local bus between the two FPGAs. The channels have status bits used to communicate that the channel is ready to be read or loaded for DMA. There are 8 address bits for 256 x32 of register memory decoded from the PCI space. In addition there are 10 "spare" lines which could be used for address expansion or other custom purposes.

Please note PMC-XM-DIFF can be used with a PMC carrier to adapt to PCI-104, PCI, PCIe, cPCI, VME and other situations. For your convenience; Dynamic Engineering has many PMC carriers.

PMC-XM-DIFF Block Diagram

PMC-XM-DIFF Features

  • Size
  • Standard Single PMC

  • FPGA
  • Virtex 4 SX35 with option for LX60

  • Temperature Sensor
  • 13 bit, one degree C I2C interface temperature sensor can be read for a local temperature. Attached to Virtex device.

  • Memory
  • Optional 1M x 36 QDR SRAM provided attached to Virtex. Additional internal Block RAM used for FIFO´s to support DMA transfers.

  • Clocking
  • Two programmable PLL reference clocks are provided for the Virtex. A reference oscillator is provided. The standard frequency is 40 MHz. Other frequencies are available by request. A 2X copy of the PCI clock is used for the inter-FPGA bus. The 66 MHz can be used as a reference.

  • IO
  • Bezel and or Pn4 IO options. 34/32 Differential transceivers with LVDS or RS-485 installed. Each IO has separate Direction and Termination control. Matched length impedance controlled routing.

  • LED´s
  • 4 LED´s controlled by the Virtex are provided. The LED´s can be used for development or user applications.

  • PCI Speed
  • Standard 33 MHz. operation

  • PCI Access Width
  • Standard 32 bit operation supported.

  • Software Interface
  • PMC registers are read-writeable. Base driver has support for reference design registers within Virtex and a "generic" capability to communicate with user defined registers and memory.

  • Interrupts
  • Status can be polled for non-interrupt driven operation. User defined interrupts supported.

  • Power
  • +5 and 3.3 required. 2.5V, 1.8V, and 1.2V converted with on-board switching regulators.

  • DIP switch
  • An 8 position switch is attached to the base FPGA to allow for configuration control, addressing multiple cards, or to facilitate debugging

    PMC XM Benefits

  • Speed
  • PMC-XM-DIFF is optimized for IO interfacing requirements. The built in PCI bus interface uses FIFO memories and programmable interrupts off-load the CPU from most of the management. Independent DMA channels further reduce CPU overhead when multiple streams are in use. The FIFO access is optimized for the PCI bus further reducing overhead by speeding up the data transfer. The PCI interface is in a separate FPGA from the user one leaving the full Virtex for your application. PMC-XM-DIFF has independent and interconnected channel functions. With LVDS - 200+ MHz IO and with RS-485 up to 40 MHz. When combined the 3.3V RS-485 devices have a reduced rate

  • Price
  • PMC-XM-DIFF is available off-the-shelf at a reasonable price. Custom versions can also be arranged. PMC-XM-DIFF is easily programmed to implement new functions. Previously implemented "custom designs" are available without the costs of schematic level design, layout, debugging etc. A modified PMC-XM-DIFF will represent a large cost and time savings in your budget. Price includes VHDL project, Driver, and reference application.

  • Ease of Use
  • PMC-XM-DIFF is easy to use. Point and shoot - just fill the FIFO and set the start bit to get your custom protocol transmitting. Built in loop-back capabilities and engineering kit helps with integration into your system. Windows driver available. Linux/VxWorks available upon request.

  • Availability
  • Dynamic Engineering works to keep the PMC-XM-DIFF base models in stock. Send in your order and in most cases have your hardware rapidly. With a custom design a 1-2 week design period is usually required. We can support immediately with the std version then the FLASH later to help get your project going - or you can do the design yourself and start now. The manuals are located at the bottom of this page.

  • Size
  • PMC-XM-DIFF is a standard single width PMC card and meets the PMC mechanical specifications. PMC-XM-DIFF can be used in all PMC slots.

  • PMC Compatibility
  • PMC-XM-DIFF is PMC compliant per the IEEE 1386 specification.

  • PCI Compatibility
  • PMC-XM-DIFF is PCI compliant. You can develop with a PCI or PCIe to PMC adapter - PCIeBPMCX1, PCI2PMC, or PCIBPMC.

    Ordering Information
    1 year warranty
    Quantity discounts available

    PMC-XM-DIFF - Standard version with Virtex SX35, PLL, DMA, Bezel IO. Includes Engineering Kit: VHDL base design for Virtex, Win7 driver with reference application and support for client alterations of reference VHDL design.
    -RAM - Add RAM to board.
    -ROHS - Add ROHS processing - standard is leaded solder
    -60 - Replace user FPGA with LX60
    -485 - Add RS-485 IO in all positions - exclusive of -LVDS option
    -LVDS - Add LVDS IO in all positions - exclusive of -485 option
    -CC - Add conformal coating to board
    -RIO - Provide Rear IO instead of bezel IO

    You must have Adobe Acrobat to read our PDF files.

    PMC-XM-DIFF Hardware Manual Hardware level design description, bit maps, pinouts, operation etc.
    PMC-XM-DIFF Software Manual User Driver manual for installation and use
    PMC-XM-DIFF Hardware Manual Eadin / Modbus implementation. Hardware level design description, bit maps, pinouts, operation etc.

    Try before you buy program

    Custom, IP, PMC, PC*MIP, PCI, VME Hardware, Software designed to your requirements

    Home | News | Search the Dynamic Engineering Site